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Staff Firmware & System Software Engineer — Platform Controller and SoC Stack

  • Source: LinkedIn
  • TYLsemi
  • On-site
  • Bengaluru
  • Full-Time
  • Staff

Job Description

About The Role We are building the software stack that runs on next-generation silicon. Based on Zephyr-platform management controller responsible for secure boot, system software on the application processor — bootloader, kernel drivers, PCIe subsystem, and IOMMU configuration — that turns raw silicon into a platform an operating system can run on.

What You’ll Do **Firmware and platform control**

  • Design, implement, and maintain Zephyr RTOS firmware for a platform management controllers, including device drivers, subsystem integration, and application-level services.
  • Write and upstream-quality-review drivers against Zephyr’s driver model — devicetree bindings, Kconfig, init levels and priorities, struct device APIs.

**System software and high-speed interconnect**

  • Bring up and debug PCIe links on first silicon — LTSSM progression, link training failures, lane reversal and polarity, equalization, speed and width negotiation.
  • Implement and maintain PCIe host controller and endpoint drivers: enumeration, configuration space, BAR allocation, MSI/MSI-X interrupt routing, AER and error handling, ASPM and link power states.
  • Configure and validate IOMMU behavior — address translation, DMA remapping, device isolation domains, page-table management, fault reporting and recovery.
  • Develop system software across the boot and runtime path: bootloader, firmware-to-OS handoff, ACPI or device tree description, kernel drivers, and the DMA and memory-management interfaces they depend on.
  • Debug DMA correctness and coherency problems end to end, from device transaction through translation to system memory.

**Silicon and process**

  • Perform post-silicon bring-up: first-boot debug, clock and reset validation, bus enumeration, triage of RTL-versus-firmware ambiguity with design teams.
  • Debug hard problems using JTAG/SWD, ETM/ITM trace, protocol analyzers, and logic analyzers — including intermittent, timing-dependent, and multi-master failures.

Required Qualifications

  • 8–10 years of professional embedded firmware and/or system software development in C, with meaningful exposure to modern C++ or Rust.
  • Deep, hands-on RTOS experience on 32-bit microcontrollers (Arm Cortex-M or RISCV) scheduling, priority assignment, ISR design, synchronization primitives, and the failure modes each one produces.
  • Proven driver development experience against a formal driver model, including bus drivers and interrupt-driven peripherals.
  • System software fundamentals: virtual memory and address translation, DMA and cache coherency, the kernel/users pace boundary, and how a platform gets from reset vector to a running OS.
  • Working knowledge of PCIe architecture — enumeration, configuration space, BARs, MSI/MSI-X, and the transaction model — sufficient to debug why a device is not appearing or not moving data.
  • Understanding of what an IOMMU is for and what it costs: translation, isolation, and the DMA failure modes that appear when it is misconfigured.
  • Demonstrated ability to read a hardware specification or register map and translate it into correct, testable software without handholding.
  • Applied AI/ML knowledge — Strong AI based coding.
  • BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.

Preferred Qualifications Strong candidates will have direct experience with several or some of the following.

  • PCIe and interconnect
  • IOMMU and virtualization
  • System software
  • RTOS and platform
  • Peripherals and subsystems

About TYLsemi, Inc. The Opportunity

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: **how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?** That’s what we solve. TYLsemi builds the **chiplet infrastructure IP** — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.

**This isn’t a nice-to-have. It’s the critical path.** Why Now

The Market Window

The semiconductor industry is going through its biggest architectural shift in 40 years:

  • Moore’s Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.
  • Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI — they’r…

Skills

  • zephyr
  • cplusplus
  • rust
  • cortex
  • openai
  • microsoft-powerpoint

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