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Staff AI Compiler Engineer (Hybrid-2 days office/3 days -home)

  • Source: LinkedIn
  • EnCharge AI
  • Remote
  • Bengaluru
  • Full-Time
  • Staff

Job Description

www.enchargeai.com

AI Compiler Engineer-Staff/Principal

Locations: Bangalore (Hybrid) Staff AI Compiler Engineer (Hybrid-2 days office/3 days -home)/Remote

The 10 Hottest Semiconductor Startups Of 2025 (So Far)

https://www.crn.com/news/components-peripherals/2025/the-10-hottest-semiconductor-startups-of-2025-so-far?page=11

https://www.enchargeai.com/blog/the-efficiency-imperative-energy-will-define-ais-next-chapter

About EnCharge AI:

AI Compiler Engineer

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems.

About the Role

EnCharge AI is seeking a highly skilled and experienced AI Compiler Engineer to spearhead the efforts in developing and optimizing graph compilers tailored to cutting-edge AI and ML workloads. You will collaborate with hardware architects, and AI researchers to enhance performance, optimize computation graphs, and enable efficient model deployment on EnCharge’s Inference Accelerators.

Responsibilities

  • Architect, design, and implement optimizations for AI model execution on graph compilers to improve performance, reduce latency, and maximize hardware utilization.
  • Work closely with ML researchers, hardware engineers, and software developers to design and deploy AI models, understanding and addressing hardware-specific challenges.
  • Work on performance optimizations for neural network models, such as layer fusion, operator fusion, and graph-level transformations.
  • Develop compiler optimizations and passes that convert high-level AI models (e.g., from TensorFlow, PyTorch) into intermediate representations (IR).
  • Implement parsing, semantic analysis, and IR generation for deep learning frameworks.
  • Research and integrate the latest advancements in compiler design, ML model optimizations, and hardware acceleration into graph compilers.
  • Provide leadership, mentorship, and technical guidance to a team of engineers focused on graph compiler optimizations.

Qualifications

  • Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field (Ph.D. preferred).
  • 7-10 years in compiler development, with a strong focus on AI or ML graph compilers.
  • Proficiency in AI graph compiler frameworks (e.g., MLIR, Torch-FX)
  • Solid background in hardware architectures (e.g., GPUs, TPUs, ASICs) and optimization techniques such as fusion, quantization, and tiling.
  • Familiarity with neural networks operators and code generation.
  • Strong understanding of intermediate representations, code parsing, and semantic analysis in compiler design.
  • Proficiency in C++, Python, or other programming languages commonly used in compiler development.
  • Open-source contributions to AI software frameworks and libraries is a plus
  • Demonstrated experience leading and mentoring engineering teams with successful project delivery

  • skills
  • MLIR
  • Pytorch
  • compilers
  • “graph compilers”
  • Torch-Fx
  • “hardware Architecture”
  • GPU
  • TPU
  • NPU
  • “Neural networks”
  • tensorflow
  • AI
  • ML
  • DL

Contact:

Uday

Mulya Technologies

[email protected]

“Mining The Knowledge Community”

Skills

  • microsoft-graph
  • Tensorflow
  • PyTorch
  • cplusplus
  • Python

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