Senior Embedded Software / Edge AI Engineer

Arcfield Overview: STC, a wholly owned subsidiary of Arcfield, was founded to do systems engineering differently. As an industry-leading solutions provider in digital engineering and model-based systems engineering (MBSE), the company delivers MBSE-as-a-Service, integrated digital engineering environment deployments, training and consulting to both commercial and public sector customers. Every day, STC’s team of expert engineers are unleashing the power of digital engineering to navigate complexity, increase understanding and inform decision-making. Learn more at stc.arcfield.com. Responsibilities:

THIS POSITION IS FOR STRATEGIC TECHNOLOGY CONSULTING (STC), AN ARCFIELD COMPANY

Strategic Technology Consulting (STC), an Arcfield Company, is seeking a Senior Embedded Software / Edge AI Engineer to develop the software infrastructure connecting an advanced VITA 90/VNX+ modular hardware ecosystem. This role will build Hardware Abstraction Layers (HALs), device interfaces, high-speed backplane data paths, and modular C++ services that allow RF sensors, PNT receivers, FPGAs, compute modules, and edge AI applications to operate as a deterministic integrated system. The engineer will work primarily in C++ on Embedded Linux, supporting hardware integration, high-speed data movement, chassis management, pntOS integration, and constrained edge inference. The ideal candidate will bring strong embedded software expertise, hands-on hardware/software integration experience, and the ability to establish modular, scalable software architectures across complex multi-vendor systems.

Responsibilities:

• Architect modular software infrastructure that moves PCIe, Ethernet, RF, navigation, telemetry, and sensor data between VITA 90/VNX+ modules.
• Translate SOSA, MOSA, MORA, and applicable VITA requirements into C++ APIs, middleware, interface controls, plugins, and HALs that isolate applications from vendor-specific hardware.
• Develop production C/C++ software for Embedded Linux, RTOS, and bare-metal environments, including device integration, device trees, boot sequences, interrupts, DMA paths, and board-support software.
• Support hardware bring-up and integration of processors, FPGAs, RF devices, sensors, PNT components, and custom electronics using JTAG and laboratory diagnostic equipment.
• Integrate PCIe, Ethernet, SPI, I2C, UART, and mission-specific interfaces, and develop low-copy or zero-copy data paths for I/Q, imagery, telemetry, navigation, and sensor data.
• Integrate pntOS and vendor software, including development of custom plugins and interfaces supporting modular PNT and mission applications.
• Partner with ML engineers to deploy trained models into real-time C/C++ applications on SWaP-constrained CPU/GPU platforms using TensorRT, ONNX Runtime, TensorFlow Lite, OpenVINO, or similar runtimes.
• Develop onboard preprocessing and IPC pipelines supporting anomaly detection, RF classification, navigation fusion, system-health monitoring, and NAVWAR situational awareness.
• Implement chassis telemetry, module discovery, fault response, card resets, and graceful degradation using VITA 46.11, IPMI, BMCs, or related protocols.
• Support automated unit, integration, regression, HIL, and system testing, along with reproducible build, release, and CI/CD environments.

Qualifications:

• BS 8-10, MS 6-8, PhD 3-5 in Computer Science, Computer Engineering, Electrical Engineering, Robotics, or a related technical field.
• Strong production experience with C/C++ for embedded, real-time, or mission-critical systems, primarily in Embedded Linux; RTOS or bare-metal experience is a plus.
• Experience with hardware bring-up, device integration, board-support software, device trees, bootloaders, interrupts, DMA, and low-level hardware interfaces.
• Experience designing modular C++ interfaces, HALs, plugins, middleware, or other hardware-independent software architectures.
• Experience integrating processors, FPGAs, RF devices, sensors, PNT components, or custom electronics using interfaces such as PCIe, Ethernet, SPI, I2C, UART, or similar technologies.
• Python proficiency for automation, data processing, integration testing, and embedded or edge-computing workflows.
• Experience integrating ML models or inference runtimes into embedded or edge environments; TensorRT, ONNX Runtime, TensorFlow Lite, OpenVINO, PyTorch, or TensorFlow experience is desirable.
• Experience with SOSA, MOSA, MORA, VITA 90/VNX+, VITA 49/VRT, VPX, V…